Power management in integrated circuits is becoming increasingly more important, particularly in power-intensive 65 nanometer (nm) and smaller IC fabrication process technologies. In order to reduce overall power consumption in the IC, it is known to place one or more logic circuits in the IC into a “Power-down” (e.g., Sleep or Standby) mode when they are not being used. For example, multiple-threshold complementary metal-oxide-semiconductor (MTCMOS) devices use high-threshold voltage (VT), low-leakage header and/or footer switches to control leakage power dissipation.
FIG. 1 illustrates a first circuit 102 including a low-VT logic circuit 104 which is selectively connected to a corresponding power supply, VDD, via a high-VT, low-leakage PMOS device 106 functioning as a header switch. PMOS device 106 receives a control signal, SLEEP, for selectively isolating the logic circuit 104 from VDD, such as in a power-down mode of operation, in order to reduce leakage power dissipation in the circuit 102. Likewise, in a second circuit 108, low-VT logic circuit 104 is connected to ground via a high-VT, low-leakage NMOS device 110 functioning as a footer switch. NMOS device 110 receives a control signal, SLEEPN, for selectively isolating the logic circuit 104 from ground, such as in a power-down mode of operation, thereby reducing leakage power dissipation in the circuit 108.
Conventional techniques for managing power in the IC generally rely on a software-based or system-level approach to generate the SLEEP of SLEEPN control signals, using a Power Management Unit (PMU) that receives instructions from a processor (e.g., Advanced RISC Machine (ARM) core). Unfortunately, these conventional approaches can significantly increase software complexity and/or cause non-optimal control signal generation. In particular, by controlling the power management function at the system level (i.e., coarse-grained control), the aforementioned approaches may cause the circuit to be powered-up longer than necessary, resulting in less of a reduction in power dissipation what would otherwise be optimally attainable.
Accordingly, there exists a need for an improved power management methodology which does not suffer from one or more of the above-noted problems exhibited by conventional power management methodologies.